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| PJ1870 20V Common-Drain Dual N-Channel MOSFET-ESD Protected FEATURES * RDS(ON), VGS@4.5V,IDS@6.5A=19m * RDS(ON), VGS@3.5V,IDS@6.0A=21m * RDS(ON), VGS@2.5V,IDS@5.5A=27m * Advanced trench process technology * High Density Cell Design For Uitra Low On-Resistance * Specially Designed for Li-lon or Li-Polymer battery packs * ESD Protected 1.5KV HBM * Pb free product : 99% Sn above can meet RoHS environment substance directive request MECHANICALDATA * Case: TSSOP-8 plastic case. * Terminals : Solderable per MIL-STD-750,Method 2026 * Marking : 1870 Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) Parameter D rai n-Source Voltage Gate-Source Voltage C onti nuous D rai n C urrent Pulsed D rai n C urrent 1) Symbol VDS VGS ID IDM TA = 25oC TA = 75oC PD TJ, TSTG 2) Limit 20 + 12 6 30 1.5 0.9 -55 to 150 83 U nit V V A A Maxi mum Power D i ssi pati on Operati ng Juncti on and Storage Temperature Range Juncti on-to-Ambi ent Thermal Resi stance (PC B mounted) W oC oC /W RJA Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 10 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE STAD-MAR.29.2006 PAGE . 1 PJ1870 ELECTRICALCHARACTERISTICS P arameter S ta tic D r a i n- S o ur c e B r e a k d o w n Vo l t a g e G a t e Thr e s ho l d Vo l t a g e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e Ze r o G a t e Vo l t a g e D r a i n C ur r e nt Ga te B o d y L e a k a g e D y n a mic V D S = 1 0 V , ID = 6 . 5 A , V G S = 5 V To t a l G a t e C h a r g e Qg G a t e - S o ur c e C ha r g e G a t e - D r a i n C ha r g e Tu r n - O n D e l a y Ti m e Tu r n - O n R i s e Ti m e Tu r n - O f f D e l a y Ti m e Tu r n - O f f F a l l Ti m e In p u t C a p a c i t a n c e O ut p ut C a p a c i t a nc e R e v e r s e Tr a n s f e r C a p a c i t a n c e S o u rc e -D ra in D io d e M a x. D i o d e F o r w a r d C ur r e nt D i o d e F o rwa rd Vo lta g e IS VSD IS = 1 . 5 A , V G S = 0 V 0 .6 4 1 .5 1 .2 A V Qg s Qg d Td ( o n ) S ymbol Te s t C o n d i t i o n Min Ty p Max U n it BVD SS V G S (th) RD S (o n) RD S (o n) RD S (o n) ID S S IG S S V G S = 0 V , ID = 2 5 0 u A V D S = V G S , ID = 2 5 0 u A V G S = 4 . 5 V , ID = 6 . 5 A V G S = 3 . 5 V , ID = 6 . 0 A V G S = 2 . 5 V , ID = 5 . 5 A V D S = 2 0 V, V G S = 0 V V G S = +1 2 V, V D S = 0 V 20 0 .5 - 15 17 21 - 19 21 27 1 + 10 V V m uA uA - 2 2 .0 4 2 .5 2 .5 4 .7 18 28 140 30 1450 210 155 nC 23 40 ns 195 42 pF V D S = 1 0 V , ID = 6 . 5 A VGS = 10V - trr td (o ff) tf Ciss Coss C rs s V D D = 1 0 V, RL = 1 0 ID = 1 A , V G E N = 4 . 5 V RG = 3 .6 - V D S = 1 0 V, V G S = 0 V f = 1 .0 MHz - Switching Test Circuit VIN VDD Gate Charge Test Circuit VGS VOUT VDD RL RL RG 1mA RG STAD-MAR.29.2006 PAGE . 2 PJ1870 Typical Characteristics Curves (TA=25OC,unless otherwise noted) 40 ID - Drain-to-Source Current (A) VGS= 3.5V, 4.0V, 4.5V, 5.0V 40 VDS =10V ID - Drain Source Current (A) 30 3.0V 30 20 2.5V 20 TJ = 125oC 10 -55oC 0 0 0.5 1 1.5 2 2.5 3 V GS - Gate-to-Source Voltage (V) 25oC 10 2.0V 1.5V 0 0 1 2 3 4 5 VDS - Drain-to-Source Voltage (V) Fig. FIG.1- Output Characteristic 1-TYPICAL FORWARD CHARACTERISTIC FIG.2- Transfer Characteristic RDS(ON) - On-Resistance (m W) 50 35 RDS(ON) - On-Resistance (m W ) 30 25 20 15 VGS=4.5V 10 5 0 0 10 20 30 40 V GS = 2.5V ID =6.5A 40 30 20 10 0 0 2 4 6 8 10 TJ =25oC 125oC ID - Drain Current (A) VGS - Gate-to-Source Voltage (V) FIG.3- On Resistance vs Drain Current RDS(ON) - On-Resistance(Normalized) FIG.4- On Resistance vs Gate to Source Voltage 2000 1.6 1.4 1.2 1 C - Capacitance (pF) V GS =4.5 V ID =6.5A 1750 1500 1250 1000 750 500 250 0 Crss 0 5 Ciss f = 1MHz V GS = 0V 0.8 0.6 -50 Coss -25 0 25 50 75 100 125 150 10 15 20 TJ - Junction Temperature (o C) VDS - Drain-to-Source Voltage (V) FIG.5- On Resistance vs Junction Temperature STAD-MAR.29.2006 FIG.6- Capacitance PAGE . 3 PJ1870 10 8 6 4 2 0 0 5 10 15 20 25 30 35 40 45 VGS - Gate-to-Source Voltage (V) Vgs Qg V D S = 10 V I D = 6 .5 A Vgs(th) Qg(th) Qgs Qsw Qgd Qg Q g - G a te C h a rg e (n C ) Fig.7 - Gate Charge Waveform Vth - G-S Threshold Voltage (NORMALIZED) Fig.8 - Gate Charge 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 o BVDSS - Breakdown Voltage (V) 1.3 26 25 24 23 22 21 -50 -25 0 25 50 75 100 125 150 ID =250uA I D = 250uA 125 150 TJ - Junction Temperature ( C) T J - Junction Te m pe ra ture (o C) Fig.9 - Threshold Voltage vs Temperature Fig.10 - Breakdown Voltage vs Junction Temperature 100 V GS = 0V IS - Source Current (A) 10 T J = 125 oC 1 -55 oC 0.1 25 oC 0.01 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V SD - Source-to-Drain Voltage (V) Fig.11 - Source-Drain Diode Forward Voltage STAD-MAR.29.2006 PAGE . 4 PJ1870 MOUNTING PAD LAYOUT ORDER INFORMATION * Packing information T/R - 3K per 13" plastic Reel LEGALSTATEMENT Copyright PanJit International, Inc 2006 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. STAD-MAR.29.2006 PAGE . 5 |
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